ECE 551 - System on Chip Design

Institution:

The University of Tennessee - Knoxville

Subject:

Electrical and Computer Engineering

Description:

Provides background and hands-on experience with top-down VLSI design flows where custom design techniques are married with HDL synthesis to produce complex digital systems. Topics covered include HDL coding techniques for system-on-chip (SOC) design, standard cell library development and use, synthesis techniques, algorithms for placement and routing, floorplanning, FPGA-based design and prototyping, timing analysis, and power-aware design techniques. Students will gain experience applying top-down VLSI design techniques in the implementation of SOCs, FPGA-based prototypes and advanced microprocessors.

Credits:

3.00

Credit Hours:

Prerequisites:

Corequisites:

Exclusions:

Level:

Instructional Type:

Lecture

Notes:

Additional Information:

Historical Version(s):

Institution Website:

www.tennessee.edu

Phone Number:

(865) 974-1000

Regional Accreditation:

Southern Association of Colleges and Schools

Calendar System:

Semester

The Course Profile information is provided and updated by third parties including the respective institutions. While the institutions are able to update their information at any time, the information is not independently validated, and no party associated with this website can accept responsibility for its accuracy.